Transistor control apparatus

ABSTRACT

There is disclosed a system utilizing transistor control apparatus for supplying operating potentials which is particularly useful with load device wherein at least two transversely oriented conductors are dielectrically isolated from a gaseous discharge medium between the conductors. The invention is illustrated in wave form generators, each having at least one output transistor. Novel transformer-diode clamping means are provided which may automatically sense saturation of an output transistor and reverse bias the collector-base junctions of the output transistors, to bring deeply saturated transistors out of saturation and enable them to turn off much more rapidly than was possible heretofore, and to sense the driving current for the primary winding of the transformer to keep the output transistor biased near saturation. The system shown thus produces a more effective wave form having steeper leading and trailing edges, the wave form in the embodiment shown being used as a sustaining voltage for cells in a gas discharge display/memory panel.

United States Patent 1191 Peters Dec. 4, 1973 Appl. No.: 313,347

Primary Examiner-John S. Huckert Assistant Examiner-R. E. Hart AttorneyDonald Keith Wedding et a1.

[57] ABSTRACT There is disclosed a system utilizing transistor controlapparatus for supplying operating potentials which is particularlyuseful with load device wherein at least [52] U.S. Cl. 307/268, 307/237,315/169 TV two transversely oriented conductors are dielectrically [51]Int. Cl. H03k 5/01 isolated from a gaseous discharge medium between [58]Field of Search .5 307/237, 261, 263, the conductors The invention isillustrated in wave 307/268, 280; 315/169 R, 169 TV form generators,each having at least one output transistor. Novel transformer-diodeclamping means are [56] References Cited provided which mayautomatically sense saturation of UNITED A S PATENTS an outputtransistor and reverse bias the collector- 3 588 597 6 1971 Murley315/169 base jmctions of the output transistors bring 3:634:71) 2/1972Emsthauserini. I i 315/16 deeply saturated transistors out of saturationand en- 3,654,388 4/1972 Slottow 315/169 able them to turn Off much morep y than was P 3,706,023 12/1972 Yamada.... 315/169 sible heretofore,and to sense the driving current for 3,155,921 11/1964 Fischman..307/261 the primary winding of the transformer to keep the 3 9/1969 r g307/268 output transistor biased near saturation. The system 3,700,92810/1972 Mllberger 307/268 Shown thus produces a more effective wave forming steeper leading and trailing edges, the wave form m n 3,705,33312/1972 Galetto 307 237 the T Show i used a Sustammg voltage for cells ma gas dlscharge dlsplaylmemory panel.

10 Claims, 3 Drawing Figures 1 UPPER SWITCHlNG SECTION 1 'i' V dcl 'i'Vdc 2 9 2 K 3 us TAI N E R O U T P U T TRANSISTOR CONTROL APPARATUSBACKGROUND OF'TI-IE INVENTION In the Baker, et al. U.S. Pat. No.3,499,167, issued Mar. 3, 1970, there is disclosed a multiple dischargedisplay and/or memory panel which may be characterized as being of thepulsing discharge type having a gaseous medium, usually a mixture of twogases at a relatively high gas pressure, in a thin gas chamber of spacebetween opposed dielectric charge storage members which are backed byconductor arrays. The conductor arrays backing each dielectric memberare transversely oriented to define or locate aplurality of discretedischarge volumes or sites and constitute a discrete discharge unit. Insome cases, the discharge units may be additionally defined by physicalstructures such as perforated glass plates and the like and in othercases capillary tubes and like structures may be used.

In the above-identified patent application of Baker, et al., physicalbarriers and isolation members for discrete discharge sites have beeneliminated. In such devices charges (electrons and ions) produced uponionization of the gas at a selected discharge site or conductorcrosspoint, when proper operating potentials are applied to selectedconductors thereof, are stored upon the surfaces of the dielectric atthe selected locations or sites and constitute an electrical fieldopposing the electrical field which created them. After a firingpotential has been applied to initiate a discharge, the electrical fieldcreated by the charges stored upon the dielectric members aids ininitiating subsequent momentary or pulsing discharges on succeeding halfcycles of an applied sustaining potential so that the applied potential,and hence the storage charges indicate the previous discharge conditionofa discharge unit or site and can constitute an electrical memory.

In dynamic operation, in addition to the sustaining voltages, writingand erasing pulses may be superimposed on and algebraically added to thesustaining wave forms applied to selected transverse conductor pairs inthe conductor arraysto manipulate' discharge conditions of dischargesites. Some of the preferred types of circuits for supplying thesustaining potentials,

and for generating the manipulating pulses to be added to the sustainingpotentials, utilize output transistors which are driven into deepsaturation to abruptly switch the wave form from one potential level toanother.

Difficulties have been encountered in the past, in that when atransistor is turned on and driven into deep saturation, it is difficultto bring the transistor out of saturation and turn it off quickly. Thismakes control of the shape of the trailing edge of the wave formdifficult, may interfere with the addition of manipulating pulses, maymake a manipulating pulse have an effective width that is too narrow,etc., and is undesirable. Diode clamping circuits have been proposed andare useful in certain applications for bringing transistors out ofsaturation within the time limits of those previous systems. However, asthe switching speeds increase and as the type of wave forms applied assustaining potentials and as manipulating pulses become more complex,the diode clamping circuit is not suitable for all applications.

Accordingly, it is an object of this invention to provide an improvedtransformer-diode clamping means, which is particularly useful inproviding improved systems for supplying operating potentials to loaddevices, and even further particularly useful wherein the load devicesare of the gas discharge display/memory type.

It is another object of this invention to provide improved voltage waveform generating means which includes at least two sections, each of thesections having an output transistor to connect first and secondpotential levels to the load device.

It is a further object of this invention to provide improved controlapparatus for transistors in which novel transformer-diode clampingcircuits may be utilized to automatically sense transistor saturationand to bring the transistor out of saturation and permit the transistorto be turned off more quickly, and also to sense the driving current forthe primary winding of the transformer to keep the output transistornear saturation.

SUMMARY OF THE INVENTION The invention is disclosed and described hereinin a system for supplying operating potentials to a gas dischargedisplay/memory device of the type described hereinbefore. A wave formgenerating means is shown which includes at least two sections, a firstof the sections being operative to connect a first potential level tothe output of the generator, while a second of the sections is operativeto connect a second potential level to the output, the output beingconnected to conductors in the array of the gas discharge device.

Each of the output sections includes at least one output transistormeans operating as a switching means between its respective potentiallevel and the output of the wave form generating means. Each of thetransistors has a collector, base and emitter electrode and acollector-base junction.

Means are provided for selectively applying turn-on or driving signalsto the base electrodes of the output transistor means, the signals beingsufficient in magnitude to drive the output transistor into saturation.Means are shown wherein the circuit may be selfsensing in that thecircuit may be responsive to the saturation of the transistor'forenabling reverse biasing of the collector-base junction.

The reverse bias establishing means for the output transistors includesatransformer having primary and secondary windings, an isolatingrectifier means, and means for connecting a reverse bias source to theprimary winding of the transformer.

There are different embodiments of the reverse bias establishing meansdisclosed herein, each useful in a particular application. The reversebias establishing means may be generically described as having secondarywinding means of the transformer means connected in a circuit with thecollector-base junction to enable current from secondary winding meansto flow through the collector-base junction in a reverse bias direction.The isolating rectifier means may be generically described as connectedin a circuit between the collector and base electrodes which includes atleast one of the primary and secondary winding means of the transformermeans to prevent current flow between the collector and base electrodesthrough the winding means in response to potential differences betweenthe collector and base electrodes which establish a forward bias on thecollector-base junction. The primary winding means of the transformermeans may be generically described as connected to receive current froma reverse bias source, which may be derived from the turnon or drivingsource for the transistor, and which will induce a potential on thesecondary winding means connected in circuit with the collector-basejunction to cause current flow through the collector-base junction in adirection to reverse bias the collector-base junction and discharge theminority carriers from the junction if saturated to enable thetransistor to turn off quickly.

Specifically, in the embodiments of the transformerdiode clamping meansdisclosed herein, the primary winding of the transformer is connected atone end via a biasing resistor to the base electrode of the outputtransistor, and at the other end via the isolating diode to thecollector of the output transistor. Means may be provided for connectingone side of the reverse bias source to the junction of the biasresistance and the primary winding. The secondary winding is connectedbetween the base electrode of the output transistor and through acircuit to the other side of the reverse bias source.

In one variation of the embodiments herein, a separate bias source isprovided which is connected to the primary winding via switching meansincluding second and third transistors. A feedback rectifier senses thedriving current being supplied to the primary winding by sensing thevoltage thereacross and feeds back a signal to the output electrode ofthe second transmitter to control the amount of driving current suppliedto the secondary transformer.

In another variation of the transformer-diode circuits disclosed herein,the reverse bias source is derived from the driving current of theturn-on source for the output transistor, the voltage being developedacross the bias resistor connecting the secondary winding and the baseelectrode of the output transistor providing the driving current for theprimary winding.

Other objects, features, and advantages will become apparent from thefollowing description when taken in conjunction with the accompanyingdrawings, in which:

FIG. 1 is a diagrammatic layout of a system for supplying sustainingvoltage for a gaseous discharge display/memory panel;

FIG. 2 is a schematic diagram ofa circuit embodying the teachings ofthis invention for supplying sustaining voltage to the row conductors ofthe panel; and

FIG. 3 is a schematic diagram of a circuit illustrating furtherteachings of this invention.

DESCRIPTION OF THE PREFERRED EMBODIMENTS The gaseous dischargedisplay/memory device, as fully disclosed in the hereinbefore referencedBaker, et al. US. Pat. No. 3,499,167, and indicated generally at in FIG. 1, utilizes a pair of dielectric films separated by a thin layer ofa gaseous discharge medium, the medium producing a copious supply ofcharges (ions and electrons) which are alternately collectable on thesurfaces of the dielectric members at opposed or facing elemental ordiscrete areas defined by the conductor matrix on non-gas-contactingsides of the dielectric members, each dielectric member presenting alarge open surface area and a plurality of pairs of elemental ordiscrete areas. While the electrically operative structural members suchas the dielectric members and the conductor matrixes 13 and 14 are allrelatively thin they are formed on and supported by rigid nonconductivesupportmembers 16 and 17, respectively, as diagrammatically shown inFIG. 1.

Typically, one or both of nonconductive support members 16 and 17 passlight produced by'discharge in the elemental gas volumes. Usually, theyare transparent glass members and these members essentially define theoverall thickness and strength of the panel. For example, the thicknessof gas layer 12, as determined by a spacer is usually under 10 mils andtypically about 4 to 6 mils, the dielectric layers (over the conductorsat the elemental or discrete areas) are usually between 1 and 2 milsthick; and conductors l3 and 14 about 8,000 angstroms thick. However,support members l6 and 17 are much thicker (particularly in largepanels) so as to provide as much ruggedness as may be desired tocompensate for stresses in the panel 20. Support members 16 and 17 alsoserve as heat sinks for heat generated by discharges and thus minimizethe effect of temperature on operation of the device. If it is desiredthat only the memory function be utilized, then none of the members needbe transparent to light.

Except for being nonconductive or good insulators the electricalproperties of support members 16 and 17 are not critical. The mainfunction of support members 16 and 17 is to provide mechanical supportand strength for the entire panel, particularly with respect to pressuredifferential acting on the panel and thermal shock. As noted earlier,they should have thermal expansion characteristics substantiallymatching the thermal expansion characteristics of the dielectric layers.Ordinary /1 inch commercial grade soda lime plate glasses have been usedfor this purpose. Other glasses such as low expansion glasses ortransparent divitrified glasses can be used provided they can withstandprocessing and have expansion characteristics substantially matchingexpansion characteristics of the dielectric coatings. For given pressuredifferentials and thickness of plates,'the stress and deflection ofplates may be determined by following standard stress and strainformulas (see R. J. Roark, Formulas for Stress and Strain, McGraw-Hill,1954).

The spacers may be made of the same glass material as'dielectric filmsand may be an integral rib or ribs formed around the outside of the areain which the gas is to be confined and on one of the dielectric members,and fused to the other member to form a bakeable hermetic seal enclosingand confining the ionizable gas volume. However, a separate, outer finalhermetic seal may be effected by a high strength devitrified glasssealant, if desired. Tabulation is provided for exhausting the spacebetween the dielectric members and filling that space with the volume ofionizable gas. For large panels small bead-like solder glass spacers maybe located between conductor intersections and fused to the dielectricmember to aid in withstanding stress on the panel and maintainuniformity of thickness of gas volume.

Conductor arrays 13 and 14 may be formed on support members 16 and 17 bya number of well-known processes, such as photoetching, vacuumdeposition, stencil screening, etc. In one embodiment, thecenterto-center spacing of conductors in the respective arrays is about17 mils. Transparent or semitransparent conductive material such as tinoxide, gold or aluminum can be used to form the conductor arrays andshould have a resistance less than about 1000 ohms per linear inch ofconductor line, usually less than about 50 ohms per inch. Narrow opaqueelectrodes may alternately be used so that discharge light passes aroundthe edges of the electrodes to the viewer. It is important to select aconductor material that is not attacked during processing by thedielectric material.

It will be appreciated that conductor arrays 13 and 14 may be wires orfilaments of copper, gold, silver or aluminum or any other conductivemetal or material. For example, 1 mil wire filaments are commerciallyavailable and may be used in the invention. However, formed in situconductor arrays are preferred since they may be more easily anduniformly placed on and adhered to the support plates 16 and 17.

The dielectric layer members are formed of an inorganic material and arepreferably formed in situ as an adherent film or coating which is notchemically or physically effected during bake-out of the panel. One suchmaterial is a solder glass such as Kimble SG-68 manufactured byandcommercially available from the assignee of the present invention.

This glass has thermal expansion characteristics substantially matchingthe thermal expansion characteristics of certain soda-lime glasses, andcan be used as the dielectric layer when the support members 16 and 17are soda-lime glass plates. The dielectric layers must be smooth andhave a dielectric strength of about 1,000 volts per mil and beelectrically homogeneous on a microscopic scale (e.g., no cracks,bubbles, crystals, dirt, surface films, etc.) In addition, the surfacesof the dielectric layers should be good photoemitters of electrons in abaked out condition. Alternatively, the dielectric layers may beovercoated with materials designed to produce good electron emission, asin U.S.

Pat. No. 3,634,719, issued to Roger B. Emsthausen. Of

course, for an optical display at least one of the dielectric layersshould pass light generated on discharge and be transparent ortranslucent and, preferably, both layers are optically transparent.

The preferred spacing between surfaces of theldielectric films is about4 to 6 mils with conductor arrays 13 and 14 having center-to-centerspacing of about 17 mils.

The ends of conductors 14-1 14-4' and support member 17 extend beyondthe enclosed gas volume and are exposed for the purpose ofmakingelectrical connection to interface and addressing circuitry indicatedgenerally at 19. Likewise, the ends of conductors 13-1 13-4 on supportmember 16 extend beyond the enclosed gas volume and are exposed for thepurpose of making electrical connection to interface and addressingcircuitry 19.

As described in detial in the Baker, et al. U.S. Pat. No. 3,499,167, theentire gas volume can be initially conditioned for subsequent operationat substantially uniform firing potentials by the use of internal orexternal radiation to supply free electrons throughout the gas medium.

Normal operation of a panel of the type described herein will bedescribed with reference to FIG. 1. Potentials having the wave forms 90and 120 as shown in FIG. 1 are supplied from row and column sustainercircuit generators 80, 1 10 via row and volumn pulsing and addressingcircuits 100, 130 to conductor arrays l4, 13 in response to controlpulses from row and column sections 72, 74 respectively of the logiccontrol circuit 70. The resultant or composite potential wave formappearing across each cell is indicated at 140 in FIG. 4 as a periodicwave form of an alternating character. The wave form 140 is derived forthe purpose of analysis of the'operation of the panel by assuming thatthe wave forms 90 and 120 are spaced 180 apart or are oppositely phasedwithin the cycles of the periodic composite wave form 140 and that thewaveform 120 is subtracted from the wave form 90.

In the examples set forth in FIG. 1, the wave form 90 is a square wavewith a duration of less than one-half of the cycle defined by thecomposite wave form 140 and with a magnitude of +Vcc. Thus, more than180 of the cycle of the composite wave form 140 elapses betweenoccurrences. The wave form 120 is a square wave with a duration of lessthan one-half of the cycle defined by the composite wave form140, andwith a magnitude of +V cc, since the sustainer 110 may be identical tothe sustainer 80. The logic inputs to the sustainers and 110 are phased180 apart with respect to the cycle of wave form 140. Therefore, thepositive wave 120 is produced when the positive wave is not beingproduced. When the positive wave form 120 is subtracted from thepositive wave form 90, the wave form 120 appears to be negative in thecomposite wave form 140.

The voltage 90 from sustainer 80 constitutes approximately one-half ofthe sustaining voltage necessary to operate the panel, the remainingone-half which is necessary being supplied by voltage 120 phased 180 asnoted above with respect to the voltage 90. Thus, onehalf of thesustainer potential 140 is applied to each of the row conductors l4 andone-half of the sustainer potential 140 is-applied to each of the columnconductors 13. The sustainer circuits 80 and advantageously have acommon ground so that the panel 10 floats with respect to ground.

Individual cells or discharge sites located by the crossing of selectedconductors or conductor arrays 14, 13 are manipulated by addingunidirectional voltage pulses at the proper'time to each ofthesustaining voltages on the selected conductors, which, when combined,are sufficient to exceedv the firing potential for the selected cellsand to initiate a sequence of discharges, one for each half-cycle of theapplied composite sustaining potential 140. By also properly timing suchunidirectional voltage pulses and applying them at a different portionin a cycle of the composite sustaining potential 140 to each of thesustaining voltages on the selected conductors, the sequence ofdischarges may be terminated. Thus, any individual discharge site maybemanipulated ON or OFF, by manipulation of the times of occurrences ofthe unidirectional voltage pulses.

The unidirectional voltage pulses are added to the sustainer voltages'90, on the selected conductors by the row and column pulsing andaddrssing circuits 100, in response to logic signals from the logiccontrol circuit 70 via leads 72-1 through 72-4 and 74-1 through 74-4,respectively, to select the conductor pairs for the individual cells.

It will be noted that between the positive half-cycles 90 and thenegative half-cycles 120 of the composite wave form there are providedplateaus at the apparent zero voltage level indicating a brief timeinterval between the cessation of the generation of one-half cycle ofthe wave form 140 and the initiation of the otherhalf-cycle of the waveform 140. These plateaus may be provided to reduce interference betweenoperation of various circuits for reasons that need not be detailedhere.

However, the plateaus provide an opportunity to discuss what happens asthe composite sustaining voltage 140 periodically alternates between theopposite polarities derived by subtracting the wave form 120 from thewave form 90. As the wave form 140 goes from the negative level of thesubtracted wave form 120 to the zero level, a cell displacement currentflow occurs and causes a positive current spike. As the wave form 140goes from the zero level to its positive level 90, a second calldisplacement current flow occurs and causes a second positive currentspike.

Similarly, as the wave form 140 goes from the positive level 90 to thezero level, a negative displacement current spike is produced. As thewave form 140 goes from zero to the negative level of the subtractedwave form 120 a second negative displacement current spike occurs.

If separation plateaus are not provided then the spikes would occur atsubstantially the same time and a single resultant larger displacementcurrent spike would occur when the composite wave form 140 reversespolarity.

If the cell in question has been manipulated to an ON" condition ashereinbefore described, then the cell will discharge when the differencebetween the wall voltage built up from a previous discharge and thesustainer potential exceeds the firing potential necessary to dischargethe cell. There then occurs a cell discharge current flow.

It is desirable that the cell not see any appreciable voltage change inthe sustainer wave form during the discharge period, since this mayinterfere with the transfer of wall charge during the discharge, so thatsubsequent discharges every half-cycle of the sustainer wave form willcontinue to occur in a manner to maintain the cell ON" in the conditionrequired.

Row and column sustainer circuits 80, 110 are advantageously constructedusing power transistors as output devices. It is desirable to be able toturn the power transistors ON" and OFF" as quickly as possible so thatthe transition slope in the'wave form controlled by the powertransistors is as steep as possible. To turn a power transistor Onquickly it is necessary to drive it with a comparatively large currentpulse which will drive the transistor into deep saturation. The furtherthe transistor is driven into saturation the smaller the internalresistance will be to the power output circuit it is controlling. Ifdriven sufficiently far into saturation the displacement and dischargecurrents may flow freely through the transistor and there will be verylittle voltage drop across the transistor during the time the cell isdischarging. Therefore, the voltage drop across the transistor will bevery small during the discharge cycle of the cell, will make very littlechange as a subtraction to the composite sustainer wave form, and willnot appreciably effect the transfer of wall charges during the dischargecycle of a cell.

Difficulties have been encountered, however, in that when the transistoris driven into deep saturation to reduce the wave form alterationresulting from displacement and discharge current flow to and below adesired level, it takes a longer time to turn the transistor OFF. Thisdecreases the slope of the wave form being produced and may delay orslow a voltage transition to a point which will interfere with properpanel operation. A power loss can be associated with slow turn-off. Inaccordance with this invention there is provided circuitry means forquickly turning-off power transistors such that there is minimum excessheating of components.

A diode clamping network has been used in the past to overcome theabove-discussed problem. In one em bodiment a single diode is connectedto conduct in a forward direction from a clamping bias junction to thecollector electrode of a power transistor connected to a voltage beingcontrolled. Two diodes in series are connected to conduct in a forwarddirection from the clamping bias junction to the base electrode of thetransistor. The emitter electrode may be connected through a resistor.The emitter electrode may be connected through a resistor to the baseelectrode.

In operation, the just discussed circuit received a turn-on pulse havinga large magnitude to drive the transistor toward deep saturation,changing the configuration of the wave form being controlled andpermitting the free flow therethrough of the displacement current anddischarge current, if any, from the panel being controlled. Since thetransistor is going toward deep saturation the resistance offeredthereby to the discharge current results only in a voltage change in thecomposite sustaining wave form which is below a level which wouldsignificantly interfere with the transfer on the wall charges in anycells in the panel which are ON.

If, in the embodiment of the diode clamping circuit being discussed, thecollector electrode is connected to an output voltage source beingcontrolled, when the flow ofdisplacement and discharge current ceasesthere is no load on the transistor and if the transistor is still beingdriven hard, then deep saturation will occur because the collectorvoltage is lower than the base voltage.

To keep the transistor out of deep saturation the collector voltage iskept just above the base voltage by the diode clamping circuit. Thediode between the collector and the clamping bias junction is requiredto isolate the voltage wave form being controlled from the base of thetransistor. If the transistor requires a V voltage drop across thebase-emitter junction (and the resistor connecting the base and emitterelectrodes) to turn it on then the isolating diode means is selected tohave a voltage drop in the forward direction in response to current flowthrough the clamping bias junction which is less than the voltage dropin the forward direction of the serially connected base diode means plusthe voltage drop across the base-emitter resistor in response to currentflow through the clamping bias junction.

Thus, if the isolating diode and any resistance associated therewith hasa voltage drop thereacross which is less than the clamping bias voltagenecessary at the clamping bias junction to keep the transistor on, thenthe collector voltage is equal to the clamping bias voltage minus theisolating diode voltage drop and is therefore larger than the basevoltage. The transistor is kept out of saturation and turns off when thedrive pulse is removed and stops conducting. relatively quickly.

The clamping bias voltage is preferably applied to the clamping biasjunction at the same time that the drive pulse is removed from the baseof the transistor.

While the just described diode clamping circuit has worked well in someapplications, it is desirable to be able to turn the power transistoroff even more quickly in certain applications. It is also desirable tobe able to use power transistors which have longer storage times (thelength of time a transistor stays in saturation without a drivingpotential applied) since the longer storage time transistors are lessexpensive. It is further desirable to be able to saturate the powertransistor as much as possible, without interfering with the ability toturn the transistor off quickly, to reduce the internal resistance evenfurther than reduced with the diode clamping circuit, so that thevoltage drop across the transistor during flow of cell discharge currentis as low as possible.

Referring now to FIG. 2 there is illustrated in more detail a schematicdiagram of a circuit which may be used as the sustainer wave formgenerator 80 to produce the wave form 90 as shown in FIG. 1. As notedhereinbefore, an identical circuit may be used to produce the wave form120.

The upper half of the circuits in FIGS. 2 and 3 is not illustrated indetail since one of the embodiments shown herein, or one of my otherembodiments of a transformer-diode clamping circuit disclosed in myconcurrently filed and copending applications illustrating improvementsenabling use of the teachings of this invention in other systems, may beused. For the purpose of avoiding obtaining a copy of theabovereferenced applications, in order to understand the operation ofthis invention, there is included hereinafter a description of theoperation of an embodiment which is suitable for use as the upperswitching circuit here.

In operation of the upper switching section, a short duration pull-upturn-on pulse is applied to the base of a first switching transistorfrom the logic control 70 via the lead 74 UN (see FIG. 1) to turn afirst switching transistor on," thereby also turning a second switchingtransistor on" and permitting current flow from a turn-on source throughthe primary winding of an isolating transformer. A drive pulse isinduced on the secondary winding of the isolating transformer causingcurrent flow to turn an output power transistor of the upper switchingsection on. The driving pulse induced in the secondary of the isolatingtransformer is I of sufficient magnitude to drive the outputpower-transistor very hard to bring the output terminal 92 to thevoltage level +Vcc as indicated in FIG. 2, and also leaves the outputpower transistor of the upper switching section saturated.

Any time after the panel displacement and discharge current flow is, forthe most part, over a pull-up turnoff pulse is applied to the baseelectrode of a third switching transistor via the lead 7 4UF from thelogic circuit 70 (FIG. 1). This pulse causes the third switchingtransistor to conduct, which, in turn, causes a fourth switchingtransistor to conduct and provide a current flow in the primary windingof a transformer of a transformer-diode clamping circuit. Current flowis induced in the secondary winding of the clamping circuit transformercausing a potential to be provided between the collector and the base ofthe output switching transistor which is higher at the collector than atthe base. The minority carriers of the saturated collectorbase junctionof the output power transistor of the upper switching section aredischarged through a diode connected in series with the secondarywinding of the clamping transformer. The transformer-diode circuit justdescribed turns the output power transistor off very quickly allowingnegative panel-address pulses to also be applied quickly to thesustainer wave form 90, which is a requirement in some addressingcircuit schemes or techniques.

The circuit illustrated in FIG. 2 will now be described. When thevoltage is to be dropped at the output terminal 92 from the level of thepotential +Vcc to ground or zero as illustrated in FIG. 1, a shortduration pull-down turn-on pulse is applied to the terminal 86Tconnected to the base of the transistor 01 by suitable means via thelead 7 4DN from the logic circuit 70. This turns the transistor Q1 on"allowing conduction of driving current from a turn-on source +Vdc2through its emitter-collector circuit thereby also turning the outputtransistor Q2 on. The driving current is sufficiently large to turn theoutput power transistor Q2 on very quickly, deeply saturating thetransistor. This quickly reduces the voltage at the terminal 92 toground level providing the zero output from the sustainer circuit asnoted in FIG. 1.

Any time after panel displacement and discharge current flow through thetransistor 02 is, for the most part, over a pull-down-turn-off pulse maybe applied to terminal 8ST connected to the base of the transistor Q3via the lead 7 4DF from the logic circuit 70. The transistor Q3 conductscausing the transistor 04 to conduct and allow current flow from oneside of the reverse bias source +Vdc1 through the primary winding TIP ofthe clamping circuit transformer T1 through the isolating rectifier D1and the collector-emitter circuit of the now saturated transistor Q2. Apotential is then induced on and current flow occurs from the secondarywinding T15 of the clamping circuit transformer T1 which is connectedbetween the base electrode of the power transistor 02 and the other sideof the reverse bias source. The developed potential on winding "US alsocauses current to flow from the primary winding TIP through theisolating diode D], the saturated collectorbase junction of the powertransistor Q2, and to the secondary winding T18 of the clamping circuittransformer T1,- discharging the minority carriers from the saturatedcollector-base junction and turning off the power transistor W2 veryquickly.

It should be noted that there will be no significant current flowthrough the secondary winding T18 of the clamping circuit transformer T1from the driving pulses for the transistor 02 and no significant currentflow through the secondary winding of the transformer T1, if there is apotential on the collector of the transistor Q2 which reverse biases thediodes D1. Such reverse biasing of D1 prevents current flow in thepromary winding TlP, reflecting a high impedance to the secondary T18and preventing any substantial current flow through the secondary fromthe driving pulses for the output transistor.

The operation of the circuit of FIG. 2 has been described to this pointas if the feedback diode Df was not connected in the circuit between theprimary winding of the transformer T1 and the output emitter of thetransistor Q3.

Assume now that the diode Df is in the circuit as shown. The operationof the circuit is still the same until the collector-base junction ofthe transistor Q2 has recovered from saturation and becomes a highimpedance to the passage of current from the primary winding T1P of thetransformer T1, indicating that the transistor Q2 is out of saturation.

This higher impedance to current flow from the primary winding willcause the voltage across the primary to increase. A bias current willthen flow from the junction of the output collector of Q3 and one end ofthe primary winding through the resistor Rb which is sufficient tomaintain the loading of the transistor Q2 near the saturation level.

The increased voltage across the primary winding of the transformer T1will also forward bias the feedback diode Df and provide a negativefeedback to the output emitter of the transistor Q3. The negativefeedback will control the action of the transistor Q4 causing it toconduct only enough to maintain a voltage across the primary windingthat will match the input to the transistor Q3, if the input is lessthan the reverse bias source +Vdcl. (Such a smaller input signal to Q3is desirable, since only low voltage level logic circuits need be usedas inputs with the inherent advantages attendant therewith.) The circuitutilizing the feedback diode Df and bias resistor Rb thus providesautomatic control of drive current to match the load presented by thecollector-base junction of the transistor Q2.

If the bias resistor Rb is omitted from the circuit and the primarywinding is not connected to the base of transistor Q2 then the circuit,including the components Q3, Q4, TIP and T18, serves only to turn thetransistor Q2 off." However, the diode Dfwould still function in thesame manner to control the amount of driving current supplied to theprimary winding of the transformer T1.

Referring now to FIG. 3, there is illustrated another embodiment of theteachings of this invention which is particularly useful in connecting aload device to ground or zero potential.

When the voltage is to be dropped at the output terminal 92 in FIG. 3from the level of the potential +Vcc to ground or zero, a short durationpull-down turn-on pulse is applied to the terminal 86T connected to thebase of the transistor Q1 by suitable means from the lead 7 4DN from thelogic circuit 70. This turns the transistor Q1 on allowing conductionthrough its emitter-collector circuit from theturn-on source +Vdc2 andapplication of a driving pulse to the baseemitter circuit of the powertransistor Q2 turning it on" very quickly and deeply saturating thetransistor. This reduces the voltage at the terminal 92 to ground levelproviding the zero output from the sustainer circuit 80.

When the transistor O2 is deeply saturated and the panel displacementand discharge current flow through the transistor O2 is over, for themost part, there will be very little voltage drop across thecollector-emitter circuit of the transistor Q2, both because theinternal resistance has been reduced by the hard driving pulse, andbecause there is little or no current flow, since terminal 92 is noweffectively connected to ground, through the internal resistance tocause a voltage drop. Therefore, when the voltage drop across Q2 fallsbelow the value necessary to reverse bias the diode D1, then the diodeD1 becomes forward biased and permits current flow, from the voltagedrop across Rb derived from the drive current, through the primarywinding TlP of the clamping circuit transformer T1.

Once current starts to flow through the primary winding TlP of thetransformer T1, the voltage in- 12 duced on the secondary TlS winding ofthe transformer Tl causes current flow across the saturatedcollector-base junction of the power transistor O2 in the reversedirection, thereby discharging the minority carriers from the saturatedcollector-base junction, enabling the power transistor O2 to turn offvery quickly when the drive current is removed from the base thereof.

As is evident by examining FIG. 3, only one source is now required sincethe reverse bias source may be derived from the turn-on source, or viceversa. Therefore an extra source of supply and/or an extra set ofconnections to an additional source are not required.

The isolating rectifier D1 is preferably interposed between the primarywinding TlP and the collector electrode of Q2, rather than on the otherside of the primary winding so as to prevent the charging ofinterelectrode capacitance between the primary and secondary (TIP andT18) of the transformer during output transitions.

It should be noted that logic leads 72DF and 74DF from the logic circuitto the sustainer circuits 80, 110 are not needed for the embodimentillustrated in FIG. 3. There is no need for a pull-down turn-off logicpulse when using the present invention, because of the automatic sensingand acting capabilities of the novel circuit of this invention Thiscircuit thus saves components and required timing logic.

It should also be noted that a mirror image type modification of thecircuits illustrated in FIGS. 2 and 3 may be constructed to producenegative pulse outputs and 120, rather than the positive pulses asshown.

It should also be noted that combinations of positive and negativesustainer wave form generator circuits may be used in certainapplications.

There have thus been described and disclosed transformer-diode clampingcircuits which may be used to turn output power transistors off after avery heavy turn-on drive pulse, enabling the power transistors to beturned off in a fraction of the normal storage time for such devices.This enables a sustainer performance to meet and match the very fastswitching speed and high current requirements of newly developeddisplay/- memory panels, as well as prior art panels. The very fast,high voltage, high current switching of the apparatus disclosed hereinfar outperforms the present prior art devices. The use of thetransformer-diode clamps described herein also permits greaterflexibility in unique logic address requirements and permits turningtransistor Q2 off more quickly than other transformer-diode clampingcircuits, since the base of the output transistor is directly forced tobe negative (in an N-P-N type). The present invention may also be usedto take advantage of gaseous mediums which are presently being testedand which exhibit much faster discharge times than past mediums.

What is claimed is:

1. In a system for supplying operating potential to a load devicewherein at least two transversely oriented conductors are dielectricallyisolated from a gas discharge medium between said conductors, comprisinga. voltage wave form generating means having an output means adapted tobe connected to a transverse conductor;

b. said wave form generating means including at least two sections, afirst of said sections being operative to connect a first potentiallevel to said output means while a second of said sections is operativeto connect a second potential level to said output means;

c. each of said output sections including at least one output transistormeans operating as a switching means between its respective potentiallevel and said output means of said wave form. generating means, eachsaid transistor means having collector, base and emitter electrodes andcollector-base junction;

d. means for selectively applying turn-on signals to the base electrodesof said output transistor means, said signals being sufficient inmagnitude to drive each of said output transistor means into saturation;

e. means for selectively establishing current flow through saidcollector-base junction of each of .said output transistor means toreverse bias said collector-base junction to enable each of said outputtransistors to turn off quickly;

, f. at least one of said reverse bias establishing means including atransformer having primary and secondary windings, isolating rectifiermeans, and means for connectingone side of a reverse bias source to saidprimary winding;

g. means for connecting said secondary winding between the baseelectrode of said output transistor and the other side of said reversebias source; and

h. means for sensing the voltage across said primary winding to supplybiasing current to the base electrode of said output transistor.

2. A system as defined in claim 1 in which said means for connecting areverse bias source to said primary includes switching means, interposedbetween the reverse bias source and the primary, which is responsive toturn-off signal to connect said reverse bias source to said primarywinding.

3. A system as defined in claim 2 in which said switching means includesa. second transistor means responsive to turn-off signal to supplydriving current to said primary means, and

b. feedback means responsive to the driving current required by saidprimary for regulating the output of said second transistor means.

4. A system as defined in claim 3 in which said means for sensing saidprimary winding voltage and supplying current to the base electrode ofsaid first-mentioned transistor means is also responsive to saidfeedback means, thereby enabling said feedback nieans to control thedriving of said first-mentioned transistor means to maintain thefirst-mentioned transistor means near saturation as current flow throughthe collector-emitter circuit thereof varies,

5. A system as defined in claim 1 in which a. a first switching means isinterposed between a turn-on source and said base electrode and isresponsive to a turn-on signal to connect said turn-on source to saidbase electrode, and

b. a second switching means is interposed between said reverse biassource and said primary winding and is responsive to a turn-off signalto connect said reverse bias source to said primary winding.

6. Control apparatus, comprising a. transistor means having collector,base, and emitter electrodes with collector-base and base-emitterjunctions between said electrodes;

b. means for connecting a turn-on source to provide a driving signal tosaid base electrode having a magnitude sufficient to turn saidtransistor on and drive said transistor into a saturated condition; and

c. means for selectively establishing current flow through saidcollector-base junction to reverse bias said junction to enable saidtransistor to turn off quickly;

dfisaid reverse bias establishing means including a transformer havingprimary and secondary windings, an isolating rectifier means, and meansfor connecting one side of a reverse bias source to said primarywinding;

e. said primary winding being connected between said collector and baseelectrodes of said one output transistor means via said isolatingrectifier means, which is connected to prevent current flow in saidsecondary winding from said collector electrode to said base electrode,so that current flow in said primary winding will induce a voltage onsaid secondary winding which will reverse bias said collector-basejunction;

f. said secondary winding being connected between said base electrodeand the other side of said reverse bias source means;

g. and means for connecting the voltage developed across said primarywinding to provide a bias current to the base electrode of saidtransistor means.

7. Apparatus as defined in claim 6 in which said reverse bias source forsaid primary winding is derived from said driving current for saidtransistor means.

8. Apparatus as defined in claim 6 in which said means for connecting areverse bias source to said primary winding includes second and thirdtransistors, said second transistor being responsive to a turn-offsignal to enable said third transistor to connect a reverse bias sourceto supply driving current to said primary winding.

9. Apparatus as defined in claim 8 which further includes feedback meansresponsive to the driving current supplied to said primary winding forregulating the output of said second transistor means.

10. Apparatus as defined in claim 9 in which the end of said primarywinding receiving driving current from said reverse bias source is alsoconnected to said base electrode of said first-mentioned transistormeans by said bias current connecting means, thereby enabling saidfeedback'means to maintain said first-mentioned transistor means nearsaturation as the current flow through the collector-emitter circuitvaries and thus also varies the current flow through said secondarywinding connected to the collector electrode of said first-mentionedtransistor means.

1. In a system for supplying operating potential to a load devicewherein at least two transversely oriented conductors are dielectricallyisolated from a gas discharge medium between said conductors, comprisinga. voltage wave form generating means having an output means adapted tobe connected to a transverse conductor; b. said wave form generatingmeans including at least two sections, a first of said sections beingoperative to connect a first potential level to said output means whilea second of said sections is operative to connect a second potentiallevel to said output means; c. each of said output sections including atleast one Output transistor means operating as a switching means betweenits respective potential level and said output means of said wave formgenerating means, each said transistor means having collector, base andemitter electrodes and collector-base junction; d. means for selectivelyapplying turn-on signals to the base electrodes of said outputtransistor means, said signals being sufficient in magnitude to driveeach of said output transistor means into saturation; e. means forselectively establishing current flow through said collector-basejunction of each of said output transistor means to reverse bias saidcollector-base junction to enable each of said output transistors toturn off quickly; f. at least one of said reverse bias establishingmeans including a transformer having primary and secondary windings,isolating rectifier means, and means for connecting one side of areverse bias source to said primary winding; g. means for connectingsaid secondary winding between the base electrode of said outputtransistor and the other side of said reverse bias source; and h. meansfor sensing the voltage across said primary winding to supply biasingcurrent to the base electrode of said output transistor.
 2. A system asdefined in claim 1 in which said means for connecting a reverse biassource to said primary includes switching means, interposed between thereverse bias source and the primary, which is responsive to turn-offsignal to connect said reverse bias source to said primary winding.
 3. Asystem as defined in claim 2 in which said switching means includes a.second transistor means responsive to turn-off signal to supply drivingcurrent to said primary means, and b. feedback means responsive to thedriving current required by said primary for regulating the output ofsaid second transistor means.
 4. A system as defined in claim 3 in whichsaid means for sensing said primary winding voltage and supplyingcurrent to the base electrode of said first-mentioned transistor meansis also responsive to said feedback means, thereby enabling saidfeedback means to control the driving of said first-mentioned transistormeans to maintain the first-mentioned transistor means near saturationas current flow through the collector-emitter circuit thereof varies. 5.A system as defined in claim 1 in which a. a first switching means isinterposed between a turn-on source and said base electrode and isresponsive to a turn-on signal to connect said turn-on source to saidbase electrode, and b. a second switching means is interposed betweensaid reverse bias source and said primary winding and is responsive to aturn-off signal to connect said reverse bias source to said primarywinding.
 6. Control apparatus, comprising a. transistor means havingcollector, base, and emitter electrodes with collector-base andbase-emitter junctions between said electrodes; b. means for connectinga turn-on source to provide a driving signal to said base electrodehaving a magnitude sufficient to turn said transistor on and drive saidtransistor into a saturated condition; and c. means for selectivelyestablishing current flow through said collector-base junction toreverse bias said junction to enable said transistor to turn offquickly; d. said reverse bias establishing means including a transformerhaving primary and secondary windings, an isolating rectifier means, andmeans for connecting one side of a reverse bias source to said primarywinding; e. said primary winding being connected between said collectorand base electrodes of said one output transistor means via saidisolating rectifier means, which is connected to prevent current flow insaid secondary winding from said collector electrode to said baseelectrode, so that current flow in said primary winding will induce avoltage on said secondary winding which will reverse bias saidcollector-base junction; f. said secondary winding being connectedbetween saId base electrode and the other side of said reverse biassource means; g. and means for connecting the voltage developed acrosssaid primary winding to provide a bias current to the base electrode ofsaid transistor means.
 7. Apparatus as defined in claim 6 in which saidreverse bias source for said primary winding is derived from saiddriving current for said transistor means.
 8. Apparatus as defined inclaim 6 in which said means for connecting a reverse bias source to saidprimary winding includes second and third transistors, said secondtransistor being responsive to a turn-off signal to enable said thirdtransistor to connect a reverse bias source to supply driving current tosaid primary winding.
 9. Apparatus as defined in claim 8 which furtherincludes feedback means responsive to the driving current supplied tosaid primary winding for regulating the output of said second transistormeans.
 10. Apparatus as defined in claim 9 in which the end of saidprimary winding receiving driving current from said reverse bias sourceis also connected to said base electrode of said first-mentionedtransistor means by said bias current connecting means, thereby enablingsaid feedback means to maintain said first-mentioned transistor meansnear saturation as the current flow through the collector-emittercircuit varies and thus also varies the current flow through saidsecondary winding connected to the collector electrode of saidfirst-mentioned transistor means.